32TB PractRand • 38 Formal/SMT/SAT/MILP/SCA Tools • Waves 1-16 • 4.0x to 24.0x Safety Margin

Formal Verification, Statistical Gauntlet & Next-Tier Cryptanalysis

Here is what we ran across all 32 hardware threads, what passed, what our internal 16-wave cryptanalytic campaign evaluated, and what those results do and don’t mean. The Z3, Bitwuzla, cvc5, CaDiCaL, Coq, F*, and SymbiYosys proofs cover formal properties of the initialization schedule, state transitions, side-channel countermeasures, and mode domain isolation. The statistical, algebraic, neural, MILP, and binary-taint suites test empirical randomness, the certified 4.0x to 24.0x reduced-round diffusion margin, and compiled machine instructions. None of that is a universal security proof, and no outside cryptanalyst has reviewed APEX-256 yet.

What these results do and don’t tell you

Passing PractRand, BigCrush, and polynomial distinguishers means the output looks random to those tests. It does not mean the cipher cannot be broken. The Z3 SMT and symbolic equivalence results prove specific mathematical properties of the initialization, state transition, and companion domain boundaries. They are not a proof of security against every possible attack.

Every test below was executed internally by Apex Research Labs, LLC. No independent third-party cryptanalysis of APEX-256 has been published yet. We actively welcome external academic and industry reviewers.

Independent review status

Mathematical Proofs & Empirical Randomness

Formal bit-vector bijection proofs, 256-bit key schedule collision immunity, and 32 TB of continuous statistical testing.

Formal SMT & Symbolic Proofs (Z3 / SAW / CASCADA)

Formal verification bounds and SAT/SMT solver constraints
Analysis Domain Methodology & Scope Proof Outcome
Single-Step State Bijection Formal bit-vector permutation proof PROVEN Strict Bijection
Full-State Transition Injectivity Z3 / Bitwuzla / Coq bit-vector equivalence UNSAT 0 State Collisions
256-Bit Key Schedule Z3 same-nonce 256-bit key collision search + 1M pairs UNSAT 0 Key Collisions
Key-Nonce Equivalence Continuous round-key binding (1M trials + Z3) UNSAT 0 / 1,000,000 Collisions
Weak-Key Immunity Z3 / SAW 256-bit constant-time initialization proof UNSAT 0 Weak Keys
Degenerate-Orbit Immunity Z3 exhaustive boundary search & 24-round init VERIFIED Constant-Time
Rotational-XOR (RX) 32-core CASCADA symbolic sweep (γ = 1..63) 63 / 63 UNSAT 0 RX Invariants
Mode Domain Isolation Z3 / SAW mode domain disjointness proof PROVEN 100% Disjoint
Invariant Subspaces 500 randomized projections, dimensions 1 to 5 0 FOUND 0 Invariant Subspaces

Statistical & Dynamical Randomness Battery

Statistical test suite results and confidence intervals
Validation Suite Test Scope Result
PractRand RNG_test 32 Terabytes / 235 stats / 42h ALL PASSED (0 Anomalies)
TestU01 BigCrush 106 tests / 160 stats / 1h54m ALL PASSED (160 / 160)
NIST SP 800-22 Rev 1a 1 GB / 15 test suites ALL PASSED (15 / 15)
Strict Avalanche (SAC) 320M pairs / 327,680 cells 50.0000% (Within 6σ)
Differential Collision Sweep 16,777,216 (224) structured 24R pairs 0 COLLISIONS (< 2-256 bound)
Floyd Cycle Search 40B+ consecutive iterations 0 CYCLES Detected
Lattice Orbit Analysis All 7 v2(k) valuation classes ALL EJECTED (0 Inconclusive)
Berlekamp-Massey 1,048,576-bit sequences PASSED L(N) ≈ N / 2
Bit Balance & Autocorr 10 MB high-resolution stream ALL PASSED

Algebraic, Neural, Spectral, SCA & Binary Constant-Time Gauntlet

32-thread evaluation across 16 cryptanalysis waves and 38 formal/SMT/SAT/MILP/SCA/RTL tools (Bitwuzla, cvc5, CaDiCaL, Coq, F*, HiGHS, SCALib, Lascar, VerFI, SymbiYosys), including hardware side-channel countermeasures, 256-bit X256 nonces, 256-byte forward-secrecy ratcheting, full-state F256 companion modes, and word-rate W64 throughput acceleration.

Algebraic, Spectral & Neural Distinguishers

Algebraic, spectral, and machine-learning cryptanalytic test results
Cryptanalytic Tool / Vector Target & Scope Measured Outcome
7-Engine Safety Margin Z3/Bitwuzla SMT, CaDiCaL SAT, HiGHS MILP, OpenMP SAC, Gohr ResNet (R = 1..24) 4.0x - 24.0x Certified Margin
CLAASP 320×64 Diffusion Coupled & uncoupled bit completeness (R = 0..24) 100.00% From Round 0
Full-State Bit Diffusion Bit-level avalanche evaluation (R = 0..24) PASSED Bias ≤ 0.01624
Gohr Residual Neural Net Deep residual classifier on keystream pairs (R = 0..24) 49.26% - 50.57% (|Z| ≤ 1.91 Noise)
CROCS BoolTest 128b, 256b, 512b & degree-2/3 polynomial XOR blocks PASSED Max |Z| ≤ 4.28 (< 4.89)
14-D Moebius ANF & Cubes Dinur-Shamir 214 cube summation (64 superpolys) DEGREE 14 / 14 (64 / 64 Dense)
Division-Property Bit-Cone HiGHS / OR-Tools MILP over 256b key + 64b/256b (X256) nonce FULL CONE Degree 192+ Bound
Walsh-Hadamard Spectrum Unwhitened 1-round coordinate projection slice PASSED High Non-Linearity Bound

Binary Constant-Time, SCA & Companion Mode Audit

White-box binary constant-time verification and companion primitive audit results
Verification Vector Instrumentation & Scope Measured Outcome
Hardware Side-Channel Hardening Datapath power/EM leakage evaluation (SCALib CPA & Lascar TVLA) CPA |r| = 0.0024 |t| = 0.74 (< 4.50)
Multi-Compiler Disassembly 36 builds across -O0, -O1, -O2, -O3, -Os, -march=native 0 DIV / 0 JCC 100% Branchless
Valgrind ctgrind & Unicorn Dynamic symbolic secret-key memory taint across all modes 0 ERRORS 0 Secret Branches
X256 Nonce & Ratcheting 256-bit X256 nonce (2128 birthday) & 256-byte one-way keyframe ratchet PROVEN 100% Chunk-Invariant
F256 & W64 Companion Suite Full 256-bit active state across HASH-W64, CFB-256, VFS-256, DRBG-256 40B CONTEXT 4x-8x W64 Speedup
RTL Synthesis & VerFI YoWASP-Yosys, SymbiYosys, Bitwuzla & VerFI fault injection VERIFIED Cycle-Exact & Fault-Locked
Full 38-Tool & KAT Battery 38 external formal/SCA tools + 16-suite C++17 KAT harness ALL PASSED 100% Bit-Exact

Round-Reduced Distinguisher & Diffusion Horizon (R = 0 to 24)

Evaluating round-reduced initialization from R = 0 through the full 24-round burn-in across our 7-engine reduced-round security-margin certification establishes a formal 4.0x to 24.0x safety margin across the 24-round initialization schedule.

Round-by-Round Security Margin Telemetry (v2.2.8.4 Engine)

Round-reduced cryptanalytic metrics from Round 0 through Round 24
Burn-In Round 1st-Byte / 256b Completeness Coupled / Uncoupled SAC Bias Gohr Neural Acc (|Z|) BoolTest Max |Z| 14-D Moebius ANF Degree Walsh-Hadamard Spectral Bound Margin Status
Round 0 100.00% / 100.00% 0.01398 / 0.01564 49.85% (0.61) 3.32 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) FULL NOISE
Round 1 100.00% / 100.00% 0.00984 / 0.01086 49.94% (0.22) 3.69 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) FULL NOISE
Round 2 100.00% / 100.00% 0.00985 / 0.01246 49.26% (1.91) 3.34 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) FULL NOISE
Round 4 100.00% / 100.00% 0.00984 / 0.01105 50.10% (0.26) 4.07 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) 6× MARGIN
Round 8 100.00% / 100.00% 0.00984 / 0.01362 49.94% (0.24) 3.41 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) 3× MARGIN
Round 12 100.00% / 100.00% 0.00988 / 0.01080 50.38% (0.98) 4.28 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) 2× MARGIN
Round 24 (Production) 100.00% / 100.00% 0.00985 / 0.01088 49.90% (0.26) 3.21 (< 4.89) 14 / 14 (64/64 Dense) PASSED (High NL) PRODUCTION

Exhaustive Boundary Verification & Vetted Evaluator Access

Formal bit-vector equivalence and boundary verification across the 24-round constant-time initialization schedule.

Formal Bit-Vector & Interactive Theorem Verification

Using Microsoft Z3, Bitwuzla, cvc5, and machine-checked Coq and F* proofs, we modeled the initialization and state transition pipeline to verify strict state injectivity, absence of weak keys, and constant-time handling of all boundary states across the 2256 key space with zero conditional branches (if/else).

Note: Internal state equations, formal SMT proof scripts, CASCADA/CLAASP/BoolTest harnesses, and bit-vector verification models are restricted intellectual property provided exclusively to vetted organizations under an executed Apex Evaluation NDA.

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